Digital EF Clock Source
Name Start Address Type Access
DIO_EF_CLOCK0_ENABLE 44900 UINT16 R/W
DIO_EF_CLOCK0_DIVISOR 44901 UINT16 R/W
DIO_EF_CLOCK0_OPTIONS 44902 UINT32 R/W
DIO_EF_CLOCK0_ROLL_VALUE 44904 UINT32 R/W
DIO_EF_CLOCK0_ENABLE
- Address: 44900
1 = enabled. 0 = disabled. Must be disabled during configuration.
  • Data type: UINT16  (type index = 0)
  • Readable and writable
  • T8:
  • T7:
DIO_EF_CLOCK0_DIVISOR
- Address: 44901
Divides the core clock. Valid options: 1,2,4,8,16,32,64,256.
  • Data type: UINT16  (type index = 0)
  • Readable and writable
  • T8:
  • T7:
DIO_EF_CLOCK0_OPTIONS
- Address: 44902
Bitmask: bit0: 1 = use external clock. All other bits reserved.
  • Data type: UINT32  (type index = 1)
  • Readable and writable
  • T8:
  • T7:
DIO_EF_CLOCK0_ROLL_VALUE
- Address: 44904
The clock count will increment continuously and then start over at zero as it reaches the roll value. DIO_EF_CLOCK0 is a 32-bit clock, valid values are 0 to (2^32 - 1). 0 results in the max roll value (2^32).
  • Data type: UINT32  (type index = 1)
  • Readable and writable
  • T8:
  • T7: